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» Incremental Circuit Simulation Using Waveform Relaxation
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ICCAD
2005
IEEE
133views Hardware» more  ICCAD 2005»
14 years 4 months ago
Gate sizing using incremental parameterized statistical timing analysis
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...
Matthew R. Guthaus, Natesan Venkateswaran, Chandu ...
VTS
1999
IEEE
81views Hardware» more  VTS 1999»
13 years 11 months ago
Simulation-Based Design Error Diagnosis and Correction in Combinational Digital Circuits
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
Debashis Nayak, D. M. H. Walker
ICCAD
2006
IEEE
165views Hardware» more  ICCAD 2006»
14 years 4 months ago
A fast block structure preserving model order reduction for inverse inductance circuits
Most existing RCL−1 circuit reductions stamp inverse inductance L−1 elements by a second-order nodal analysis (NA). The NA formulation uses nodal voltage variables and describ...
Hao Yu, Yiyu Shi, Lei He, David Smart
ASPDAC
2006
ACM
74views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Macromodelling oscillators using Krylov-subspace methods
— We present an efficient method for automatically extracting unified amplitude/phase macromodels of arbitrary oscillators from their SPICE-level circuit descriptions. Such com...
Xiaolue Lai, Jaijeet S. Roychowdhury
ISCAS
2006
IEEE
186views Hardware» more  ISCAS 2006»
14 years 1 months ago
An FCC compliant pulse generator for IR-UWB communications
—In [1], we have shown that it is feasible to design filters with arbitrary waveform responses and therefore we propose an ultra-wideband pulse generator incorporating a filter w...
Sumit Bagga, Sandro A. P. Haddad, Wouter A. Serdij...