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VEE
2012
ACM
187views Virtualization» more  VEE 2012»
12 years 3 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...
VLSID
2009
IEEE
139views VLSI» more  VLSID 2009»
14 years 8 months ago
Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration
Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chi...
Tameesh Suri, Aneesh Aggarwal
MICRO
2006
IEEE
89views Hardware» more  MICRO 2006»
14 years 1 months ago
DMDC: Delayed Memory Dependence Checking through Age-Based Filtering
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
Fernando Castro, Luis Piñuel, Daniel Chaver...
ESTIMEDIA
2009
Springer
14 years 2 months ago
Software parallel CAVLC encoder based on stream processing
—Real-time encoding of high-definition H.264 video is a challenge to current embedded programmable processors. Emerging stream processing methods supported by most GPUs and progr...
Ju Ren, Yi He, Wei Wu, Mei Wen, Nan Wu, Chunyuan Z...
APCSAC
2005
IEEE
14 years 1 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi