2784 search results - page 534 / 557 » Instruction Level Parallelism |
HPCA
2009
IEEE
14 years 11 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
HPCA
2009
IEEE
14 years 11 months ago
2009
IEEE
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
HPCA
2009
IEEE
14 years 11 months ago
2009
IEEE
Software cache-based side channel attacks present serious threats to modern computer systems. Using caches as a side channel, these attacks are able to derive secret keys used in ...
KDD
2002
ACM
14 years 11 months ago
2002
ACM
The goal of the knowledge discovery and data mining is to extract the useful knowledge from the given data. Visualization enables us to find structures, features, patterns, and re...
HPCA
2006
IEEE
14 years 11 months ago
2006
IEEE
As increasingly larger memories are used to bridge the widening gap between processor and disk speeds, main memory energy consumption is becoming increasingly dominant. Even thoug...