138 search results - page 11 / 28 » Instruction Scheduling and Executable Editing |
ICCD
2003
IEEE
14 years 4 months ago
2003
IEEE
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
MICRO
2006
IEEE
13 years 7 months ago
2006
IEEE
Predication facilitates high-bandwidth fetch and large static scheduling regions, but has typically been too complex to implement comprehensively in out-of-order microarchitecture...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
One of the upcoming challenges in embedded processing is to incorporate an increasing amount of adaptivity in order to respond to the multifarious constraints induced by today’s...
MICRO
1999
IEEE
14 years 6 days ago
1999
IEEE
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
ISCAPDCS
2004
13 years 9 months ago
2004
Hyperthreaded(HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by ex...