—Integrated circuit process technology is entering the ultra deep submicron era. At this level, interconnect structure becomes very stiff and the metal resistance shielding effec...
: Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these...
Chandramouli V. Kashyap, Charles J. Alpert, Frank ...
This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...