This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
Realization of high-performance domino logic depends strongly on energy-efficient and noise-tolerant interconnect design in ultra deep sub-micron processes. We characterize the c...
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L....
—Due to the scaling down of device geometry and increasing of frequency in deep submicron designs, crosstalk between interconnection wires has become an important issue in very l...
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...
Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram,...
This paper presents a new concept for accurate modeling and timing simulationof electronicsystems integrated in a typical VHDL design environment, taking into account the requirem...