816 search results - page 103 / 164 » Interconnect design methods for memory design |
ISCA
2006
IEEE
13 years 7 months ago
2006
IEEE
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
CASES
2003
ACM
14 years 29 days ago
2003
ACM
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting ...
ISPASS
2010
IEEE
14 years 2 months ago
2010
IEEE
—Until recently, most high-end scientific applications have been immune to performance problems caused by NonUniform Memory Access (NUMA). However, current trends in micro-proces...
CG
2007
Springer
13 years 7 months ago
2007
Springer
Algorithms that use point-cloud models make heavy use of the neighborhoods of the points. These neighborhoods are used to compute the surface normals for each point, mollificatio...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Testing today of a several hundred million transistor System-on-Chip with analog, RF blocks, many processor cores and tens of memories is a huge task. What will test technology be...