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» Interconnect design methods for memory design
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ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Hardware debugging method based on signal transitions and transactions
- This paper proposes a hardware design debugging method, Transition and Transaction Tracer (TTT), which probes and records the signals of interest for a long time, hours, days, or...
Nobuyuki Ohba, Kohji Takano
SASP
2009
IEEE
222views Hardware» more  SASP 2009»
14 years 2 months ago
A memory optimization technique for software-managed scratchpad memory in GPUs
—With the appearance of massively parallel and inexpensive platforms such as the G80 generation of NVIDIA GPUs, more real-life applications will be designed or ported to these pl...
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh
DAC
2004
ACM
14 years 8 months ago
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik...
DAC
2006
ACM
14 years 1 months ago
DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip
A novel routing algorithm, namely dynamic XY (DyXY) routing, is proposed for NoCs to provide adaptive routing and ensure deadlock-free and livelock-free routing at the same time. ...
Ming Li, Qing-An Zeng, Wen-Ben Jone
MOBICOM
2006
ACM
14 years 1 months ago
Video streaming over overlaid bluetooth piconets (OBP)
In a large scale Bluetooth network, scatternet has been regarded as the only interconnection method among piconets. But, most Bluetooth devices do not support scatternet connectio...
Sewook Jung, Alexander Chang, Mario Gerla