816 search results - page 7 / 164 » Interconnect design methods for memory design |
115
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ISCA
1996
IEEE
15 years 7 months ago
1996
IEEE
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
Variabilities in metal interconnect structures can affect circuit timing performance or even cause function failure in VLSI designs. This paper proposes a method to estimate the ...
107
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ASPDAC
1995
ACM
15 years 7 months ago
1995
ACM
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
175
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TACAS
2001
Springer
15 years 8 months ago
2001
Springer
In previous work we have developed and prototyped a silicon compiler which translates a functional language (SAFL) into hardware. Here we present a SAFL-level program transformati...
127
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ISVLSI
2008
IEEE
15 years 10 months ago
2008
IEEE
We present methods to design programs or electronic circuits, for performing any operation on k registers of any sizes in a processor, in such a way that one uses no other working...