816 search results - page 7 / 164 » Interconnect design methods for memory design |
ISCA
1996
IEEE
13 years 11 months ago
1996
IEEE
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Variabilities in metal interconnect structures can affect circuit timing performance or even cause function failure in VLSI designs. This paper proposes a method to estimate the ...
ASPDAC
1995
ACM
13 years 11 months ago
1995
ACM
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
TACAS
2001
Springer
13 years 12 months ago
2001
Springer
In previous work we have developed and prototyped a silicon compiler which translates a functional language (SAFL) into hardware. Here we present a SAFL-level program transformati...
ISVLSI
2008
IEEE
14 years 1 months ago
2008
IEEE
We present methods to design programs or electronic circuits, for performing any operation on k registers of any sizes in a processor, in such a way that one uses no other working...