731 search results - page 42 / 147 » Interconnect modeling for improved system-level design optim... |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthe...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
ICASSP
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper describes a method for designing oversampled DFT filter banks (FB) optimized for subband acoustic echo cancellation (AEC). For this application, the design requirements...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...