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ECRTS
2005
IEEE
14 years 1 months ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
ISPAN
2005
IEEE
14 years 1 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
ANCS
2005
ACM
14 years 1 months ago
Fast and scalable pattern matching for content filtering
High-speed packet content inspection and filtering devices rely on a fast multi-pattern matching algorithm which is used to detect predefined keywords or signatures in the packe...
Sarang Dharmapurikar, John W. Lockwood
SACRYPT
2005
Springer
189views Cryptology» more  SACRYPT 2005»
14 years 1 months ago
A Scalable, Delegatable Pseudonym Protocol Enabling Ownership Transfer of RFID Tags
The ability to link two different sightings of the same Radio Frequency Identification (RFID) tag enables invasions of privacy. The problem is aggravated when an item, and the ta...
David Molnar, Andrea Soppera, David Wagner
CASES
2004
ACM
14 years 1 months ago
Safely exploiting multithreaded processors to tolerate memory latency in real-time systems
A coarse-grain multithreaded processor can effectively hide long memory latencies by quickly switching to an alternate task when the active task issues a memory request, improving...
Ali El-Haj-Mahmoud, Eric Rotenberg