Sciweavers

108 search results - page 16 / 22
» Introspective 3D chips
Sort
View
ISQED
2010
IEEE
103views Hardware» more  ISQED 2010»
14 years 2 months ago
Thermal-aware job allocation and scheduling for three dimensional chip multiprocessor
- In this paper, we propose a thermal-aware job allocation and scheduling algorithm for three-dimensional (3D) chip multiprocessor (CMP). The proposed algorithm assigns hot jobs to...
Shaobo Liu, Jingyi Zhang, Qing Wu, Qinru Qiu
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
14 years 3 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGAâ€...
Matthew French, Erik Anderson, Dong-In Kang
ARC
2012
Springer
280views Hardware» more  ARC 2012»
12 years 4 months ago
Scalable Memory Hierarchies for Embedded Manycore Systems
As the size of FPGA devices grows following Moore’s law, it becomes possible to put a complete manycore system onto a single FPGA chip. The centralized memory hierarchy on typica...
Sen Ma, Miaoqing Huang, Eugene Cartwright, David L...
JETC
2008
127views more  JETC 2008»
13 years 7 months ago
Automated module assignment in stacked-Vdd designs for high-efficiency power delivery
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
Yong Zhan, Sachin S. Sapatnekar
TVLSI
2010
13 years 3 months ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang