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» Introspective 3D chips
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ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
14 years 1 months ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
VLSID
2010
IEEE
202views VLSI» more  VLSID 2010»
13 years 6 months ago
Processor Architecture Design Using 3D Integration Technology
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect...
Yuan Xie
ASPDAC
2006
ACM
166views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Temperature-aware routing in 3D ICs
Three-dimensional integrated circuits (3D ICs) provide an attractive solution for improving circuit performance. Such solutions must be embedded in an electrothermally-conscious d...
Tianpei Zhang, Yong Zhan, Sachin S. Sapatnekar
ASPDAC
2009
ACM
104views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Addressing thermal and power delivery bottlenecks in 3D circuits
— The enhanced packing densities facilitated by 3D integrated circuit technology also has an unwanted side-effect, in the form of increasing the amount of current per unit footpr...
Sachin S. Sapatnekar
3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
14 years 2 months ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...