129 search results - page 1 / 26 » Layout synthesis for datapath designs |
EURODAC
1995
IEEE
14 years 2 months ago
1995
IEEE
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
DAC
1998
ACM
14 years 11 months ago
1998
ACM
Commercial tools for standard-cell based datapath design are here classed according to design flows, and the advantages of each class are discussed with the results of two test ci...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
ARITH
2009
IEEE
14 years 5 months ago
2009
IEEE
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
ISSS
1995
IEEE
14 years 2 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...