491 search results - page 64 / 99 » Leakage power modeling and optimization in interconnection n... |
SAMOS
2004
Springer
14 years 1 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
NANONET
2009
Springer
14 years 18 days ago
2009
Springer
3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between...
WOSP
2010
ACM
14 years 2 months ago
2010
ACM
We propose a model-based methodology to size and plan enterprise applications under Service Level Agreements (SLAs). Our approach is illustrated using a real-world Enterprise Reso...
ICCD
2007
IEEE
14 years 5 months ago
2007
IEEE
Most previous 3D IC research focused on “stacking” traditional 2D silicon layers, so the interconnect reduction is limited to interblock delays. In this paper, we propose tech...
SECON
2008
IEEE
14 years 2 months ago
2008
IEEE
—Delay Tolerant Networks are wireless networks where disconnections may occur frequently due to propagation phenomena, node mobility, and power outages. Propagation delays may al...