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ICCD
2006
IEEE
111views Hardware» more  ICCD 2006»
14 years 5 months ago
Implicit Search-Space Aware Cofactor Expansion: A Novel Preimage Computation Technique
Abstract— In this paper, we introduce a novel preimage computation technique that directly computes the circuit cofactors without an explicit search for any satisfiable solution...
Kameshwar Chandrasekar, Michael S. Hsiao
EUROCRYPT
2012
Springer
11 years 11 months ago
Fully Homomorphic Encryption with Polylog Overhead
We show that homomorphic evaluation of (wide enough) arithmetic circuits can be accomplished with only polylogarithmic overhead. Namely, we present a construction of fully homomorp...
Craig Gentry, Shai Halevi, Nigel P. Smart
FPL
2009
Springer
156views Hardware» more  FPL 2009»
14 years 1 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
CODES
2005
IEEE
14 years 2 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
FPL
2008
Springer
207views Hardware» more  FPL 2008»
13 years 10 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana