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MICRO
2007
IEEE
150views Hardware» more  MICRO 2007»
14 years 5 months ago
Leveraging 3D Technology for Improved Reliability
Aggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower sup...
Niti Madan, Rajeev Balasubramonian
SC
2009
ACM
14 years 5 months ago
Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems
The scalability of future massively parallel processing (MPP) systems is being severely challenged by high failure rates. Current hard disk drive (HDD) checkpointing results in ov...
Xiangyu Dong, Naveen Muralimanohar, Norman P. Joup...
ICPP
2008
IEEE
14 years 5 months ago
Thermal Management for 3D Processors via Task Scheduling
A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, high-speed interface to increase the device density and ...
Xiuyi Zhou, Yi Xu, Yu Du, Youtao Zhang, Jun Yang 0...
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 5 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
TPDS
2010
109views more  TPDS 2010»
13 years 9 months ago
Thermal-Aware Task Scheduling for 3D Multicore Processors
Abstract—A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, highspeed interface to increase the device den...
Xiuyi Zhou, Jun Yang 0002, Yi Xu, Youtao Zhang, Ji...