102 search results - page 4 / 21 » Leveraging High Performance Data Cache Techniques to Save Po... |
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
IPCCC
2006
IEEE
14 years 1 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
On chip memories provide fast and energy efficient storage for code and data in comparison to caches or external memories. We present techniques and algorithms that allow for an au...
ISLPED
2005
ACM
14 years 27 days ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...