227 search results - page 17 / 46 » Limits to the Performance of Software Shared Memory: A Layer... |
HASE
2007
IEEE
14 years 2 months ago
2007
IEEE
Systems such as software transactional memory and some exception handling techniques use transactions. However, a typical limitation of such systems is that they do not allow syst...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
MOBIWAC
2006
ACM
14 years 1 months ago
2006
ACM
Many research projects have defined applications that are claimed to operate in a MANet environment. Consider for instance these software tools that make it possible to share inf...