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CODES
2005
IEEE
14 years 1 months ago
Designing real-time H.264 decoders with dataflow architectures
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
Youngsoo Kim, Suleyman Sair
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
14 years 1 months ago
Non-fractional parallelism in LDPC decoder implementations
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
John Dielissen, Andries Hekstra
GLOBECOM
2006
IEEE
14 years 1 months ago
On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference
— In forward error correction, convolutional turbo codes were introduced to increase error correction capability approaching the Shannon bound. Decoding of these codes, however, ...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
DATE
2006
IEEE
219views Hardware» more  DATE 2006»
14 years 1 months ago
Low cost LDPC decoder for DVB-S2
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) algorithm is gaining increased attention in communication standards and literature. The ne...
John Dielissen, Andries Hekstra, Vincent Berg
ASAP
2005
IEEE
93views Hardware» more  ASAP 2005»
13 years 9 months ago
Instruction Set Extensions for Reed-Solomon Encoding and Decoding
Reed-Solomon codes are an important class of error correcting codes used in many applications related to communications and digital storage. The fundamental operations in Reed-Sol...
Suman Mamidi, Daniel Iancu, Andrei Iancu, Michael ...