1929 search results - page 318 / 386 » Load Balancing with Memory |
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
CGO
2008
IEEE
14 years 3 months ago
2008
IEEE
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
LCTRTS
2007
Springer
14 years 3 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
SIGCOMM
2006
ACM
14 years 3 months ago
2006
ACM
There is a growing demand for network devices capable of examining the content of data packets in order to improve network security and provide application-specific services. Most...
VISUALIZATION
2005
IEEE
14 years 2 months ago
2005
IEEE
The Multi Triangulation framework (MT) is a very general approach for managing adaptive resolution in triangle meshes. The key idea is arranging mesh fragments at different resolu...