141 search results - page 17 / 29 » Load Execution Latency Reduction |
MICRO
2002
IEEE
14 years 1 months ago
2002
IEEE
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
SIGMETRICS
1997
ACM
14 years 24 days ago
1997
ACM
Enterprise level web proxies relay world-wide web traffic between private networks and the Internet. They improve security, save network bandwidth, and reduce network latency. Wh...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
DAC
2001
ACM
14 years 9 months ago
2001
ACM
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...