Sciweavers

233 search results - page 36 / 47
» Logic design for low-voltage low-power CMOS circuits
Sort
View
ARITH
2009
IEEE
14 years 3 months ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
CASES
2006
ACM
14 years 2 months ago
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...
Mark Hempstead, Gu-Yeon Wei, David Brooks
FPGA
2005
ACM
122views FPGA» more  FPGA 2005»
14 years 2 months ago
Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
Yan Lin, Fei Li, Lei He
VLSISP
2010
148views more  VLSISP 2010»
13 years 7 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
DAC
2005
ACM
13 years 10 months ago
Keeping hot chips cool
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
Ruchir Puri, Leon Stok, Subhrajit Bhattacharya