233 search results - page 41 / 47 » Logic design for low-voltage low-power CMOS circuits |
ISQED
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper proposes a new clocking strategy for dynamic circuit. It provides faster performance and smaller area than conventional clocking scheme. The proposed clocking scheme fo...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
As FPGAs enter the nanometer regime, several modifications are needed to reduce the increasing leakage power dissipation. Hence, this work presents some modifications to the FPG...
DATE
2009
IEEE
14 years 16 days ago
2009
IEEE
This paper exploits the unique in-field controllability of the device polarity of ambipolar carbon nanotube field effect transistors (CNTFETs) to design a technology library with ...
CHES
2005
Springer
14 years 2 months ago
2005
Springer
During the last years, several logic styles that counteract side-channel attacks have been proposed. They all have in common that their level of resistance heavily depends on imple...