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» Logic design for low-voltage low-power CMOS circuits
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DELTA
2004
IEEE
14 years 9 days ago
Low Voltage CMOS op-amp with Rail-to-Rail Input/Output Swing
Abstract--As the supply voltage to a standard CMOS opamp is reduced, the input common mode range and the output swing get reduced drastically. Special biasing circuits have to be u...
S. V. Gopalaiah, A. P. Shivaprasad
ITC
1998
IEEE
89views Hardware» more  ITC 1998»
14 years 24 days ago
Detecting resistive shorts for CMOS domino circuits
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
Jonathan T.-Y. Chang, Edward J. McCluskey
ISQED
2006
IEEE
176views Hardware» more  ISQED 2006»
14 years 2 months ago
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
Zhiyu Liu, Volkan Kursun
CORR
2010
Springer
152views Education» more  CORR 2010»
13 years 6 months ago
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
CDES
2006
240views Hardware» more  CDES 2006»
13 years 10 months ago
Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
Arun N. Chandorkar, Gurvinder Singh