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DAC
2005
ACM
13 years 9 months ago
Response compaction with any number of unknowns using a new LFSR architecture
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...
Erik H. Volkerink, Subhasish Mitra
ICCAD
2001
IEEE
84views Hardware» more  ICCAD 2001»
14 years 4 months ago
On Identifying Don't Care Inputs of Test Patterns for Combinational Circuits
Given a test set for stuck-at faults, some of primary input values may be changed to opposite logic values without losing fault coverage. We can regard such input values as don’...
Seiji Kajihara, Kohei Miyase
PEPM
2010
ACM
14 years 4 months ago
PET: a partial evaluation-based test case generation tool for Java bytecode
PET is a prototype Partial Evaluation-based Test case generation tool for a subset of Java bytecode programs. It performs white-box test generation by means of two consecutive Par...
Elvira Albert, Miguel Gómez-Zamalloa, Germ&...
ICML
2009
IEEE
14 years 8 months ago
Deep transfer via second-order Markov logic
Standard inductive learning requires that training and test instances come from the same distribution. Transfer learning seeks to remove this restriction. In shallow transfer, tes...
Jesse Davis, Pedro Domingos
ET
2010
98views more  ET 2010»
13 years 6 months ago
MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics
Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to...
Stephan Eggersglüß, Görschwin Fey,...