The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...
Recent advances in mechanical techniques for systematic testing have increased our ability to automatically find subtle bugs, and hence to deploy more dependable software. This pap...
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...
In a faulty digital circuit, many (single) faulty gates may explain the observed findings. In this paper we are mostly concerned, not in obtaining alternative diagnoses, but rathe...