52 search results - page 3 / 11 » Low Power BIST Based on Scan Partitioning |
TC
2008
13 years 7 months ago
2008
A low-transition test pattern generator, called the low-transition linear feedback shift register (LT-LFSR), is proposed to reduce the average and peak power of a circuit during te...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...
ATS
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract—This paper presents a low transition test pattern generator, called LT-LFSR, to reduce average and peak power of a circuit during test by reducing the transitions within...
ITC
1996
IEEE
13 years 11 months ago
1996
IEEE
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
DAC
2004
ACM
14 years 27 days ago
2004
ACM
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...