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ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
14 years 1 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
DAC
2004
ACM
14 years 8 months ago
Design optimizations for microprocessors at low temperature
We investigate trade-offs in microprocessor frequency and system power achievable for low temperature operation in scaled high leakage technologies by combining refrigeration with...
Arman Vassighi, Ali Keshavarzi, Siva Narendra, Ger...
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
14 years 2 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
BROADNETS
2006
IEEE
14 years 1 months ago
SeeMote: In-Situ Visualization and Logging Device for Wireless Sensor Networks
In this paper we address three challenges that are present when building and analyzing wireless sensor networks (WSN) as part of ubiquitous computing environment: the need for an ...
Leo Selavo, Gang Zhou, John A. Stankovic
DAC
2000
ACM
14 years 8 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf