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ISCAPDCS
2004
15 years 6 months ago
Detecting Grid-Abuse Attacks by Source-based Monitoring
While it provides the unprecedented processing power to solve many large scale computational problems, GRID, if abused, has the potential to easily be used to launch (for instance...
Jianjia Wu, Dan Cheng, Wei Zhao
ICCAD
1999
IEEE
89views Hardware» more  ICCAD 1999»
15 years 9 months ago
A bipartition-codec architecture to reduce power in pipelined circuits
This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-J...
ITC
1999
IEEE
78views Hardware» more  ITC 1999»
15 years 9 months ago
Minimized power consumption for scan-based BIST
Power consumption of digital systems may increase significantly during testing. In this paper, systems equipped with a scan-based built-in self-test like the STUMPS architecture a...
Stefan Gerstendörfer, Hans-Joachim Wunderlich
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
15 years 10 months ago
Dynamic power management using on demand paging for networked embedded systems
— The power consumption of the network interface plays a major role in determining the total operating lifetime of wireless networked embedded systems. In case of on-demand pagin...
Yuvraj Agarwal, Curt Schurgers, Rajesh Gupta
DATE
2000
IEEE
90views Hardware» more  DATE 2000»
15 years 9 months ago
Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...
Jörg Henkel, Tony Givargis, Frank Vahid