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ISLPED
1999
ACM
90views Hardware» more  ISLPED 1999»
13 years 12 months ago
Way-predicting set-associative cache for high performance and low energy consumption
This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way p...
Koji Inoue, Tohru Ishihara, Kazuaki Murakami
GLOBECOM
2008
IEEE
14 years 2 months ago
High-Rate Space-Time Coded Large MIMO Systems: Low-Complexity Detection and Performance
— Large MIMO systems with tens of antennas in each communication terminal using full-rate non-orthogonal spacetime block codes (STBC) from Cyclic Division Algebras (CDA) can achi...
Saif K. Mohammed, Ananthanarayanan Chockalingam, B...
CSREAESA
2004
13 years 9 months ago
A High Performance, Low Area Overhead Carry Lookahead Adder
Adders are some of the most critical data path circuits requiring considerable design effort in order to "squeeze" out as much performance gain as possible. Many adder d...
James Levy, Jabulani Nyathi
HAPTICS
2005
IEEE
14 years 1 months ago
Design and Performance of a High Fidelity, Low Mass, Linear Haptic Display
We built a high fidelity, low mass, linear haptic display, with a peak force output of 8.5 Newtons,
David W. Weir, Michael A. Peshkin, J. Edward Colga...
PPAM
2007
Springer
14 years 1 months ago
New Data Structures for Matrices and Specialized Inner Kernels: Low Overhead for High Performance
Dense linear algebra codes are often expressed and coded in terms of BLAS calls. This approach, however, achieves suboptimal performance due to the overheads associated to such cal...
José R. Herrero