3799 search results - page 36 / 760 » Low Power or High Performance |
121
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IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
Although high branch prediction accuracy is necessary for high performance, it typically comes at the cost of larger predictor tables and/or more complex prediction algorithms. Un...
149
Voted
ISLPED
2004
ACM
15 years 9 months ago
2004
ACM
This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high s...
139
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ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
159
Voted
TMC
2010
15 years 1 months ago
2010
—Energy-efficiency is a central challenge in sensor networks, and the radio is a major contributor to overall energy node consumption. Current energy-efficient MAC protocols fo...
103
Voted
ICCD
2004
IEEE
16 years 15 days ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...