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134
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HPCA
2001
IEEE
16 years 4 months ago
Dynamic Thermal Management for High-Performance Microprocessors
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
David Brooks, Margaret Martonosi
124
Voted
DSD
2004
IEEE
132views Hardware» more  DSD 2004»
15 years 7 months ago
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy
Filter cache(FC) is effective in achieving energy saving at the expense of some performance degradation. The energy savings, here, comes from repeated execution of tiny loops from...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
149
Voted
ICCAD
1995
IEEE
129views Hardware» more  ICCAD 1995»
15 years 7 months ago
Activity-driven clock design for low power circuits
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
Gustavo E. Téllez, Amir H. Farrahi, Majid S...
158
Voted
DAC
2004
ACM
15 years 7 months ago
Practical repeater insertion for low power: what repeater library do we need?
In this paper, we investigate the problem of repeater insertion for low power under a given timing budget. We propose a novel repeater insertion algorithm to compute the optimal r...
Xun Liu, Yuantao Peng, Marios C. Papaefthymiou
CSREAESA
2006
15 years 5 months ago
Novel and Efficient 4: 2 and 5: 2 Compressors with Minimum Number of Transistors Designed for Low-Power Operations
This paper proposes efficient and optimal 4:2 and 5:2 compressors. The compressors are highly optimized in terms of transistor count. These designs have the principle advantage th...
Pallavi Devi Gopineedi, Himanshu Thapliyal, M. B. ...