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NOCS
2010
IEEE
15 years 1 months ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
ISVLSI
2006
IEEE
137views VLSI» more  ISVLSI 2006»
15 years 10 months ago
Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J....
IPPS
1998
IEEE
15 years 8 months ago
Performance and Experience with LAPI - a New High-Performance Communication Library for the IBM RS/6000 SP
LAPI is a low-level, high-performance communication interface available on the IBM RS/6000 SP system. It provides an activemessage-like interface along with remote memory copy and...
Gautam Shah, Jarek Nieplocha, Jamshed H. Mirza, Ch...
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 8 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
ICRA
2005
IEEE
257views Robotics» more  ICRA 2005»
15 years 9 months ago
Nonlinear Performance Limits for High Energy Density Piezoelectric Bending Actuators
Abstract— To keep pace with recent advances in microrobotic structures demands actuator technologies which can deliver high power and precise motion. For electroactive material b...
Robert J. Wood, Erik Steltz, Ronald S. Fearing