240 search results - page 12 / 48 » Low energy asynchronous architectures |
HPCA
2001
IEEE
14 years 8 months ago
2001
IEEE
While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs ...
CC
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
ASAP
2003
IEEE
14 years 1 months ago
2003
IEEE
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
ADHOC
2008
13 years 7 months ago
2008
Sensor network MAC protocols typically sacrifice packet latency to achieve energy efficiency. Such delays may well increase due to routing protocol operation. For this reason it i...