240 search results - page 13 / 48 » Low energy asynchronous architectures |
ICCCN
2007
IEEE
14 years 2 months ago
2007
IEEE
—Multimedia requirements of the 1990’s drove wired and optical network architects to reconsider the inefficiencies of packet switching and consider long proven methods such as...
ISCA
2008
IEEE
13 years 7 months ago
2008
IEEE
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
A 0.4-V UWB digital baseband processor has been fabricated in a standard-VT 90-nm CMOS technology. The baseband processor operates at an ultra-low supply voltage to reduce energy ...