240 search results - page 16 / 48 » Low energy asynchronous architectures |
VLSID
2010
IEEE
13 years 11 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
DSD
2002
IEEE
14 years 21 days ago
2002
IEEE
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges in...
EENERGY
2010
13 years 8 months ago
2010
Energy efficient networks are becoming a hot research topic, and the networking community is increasingly devoting its attention to the identification of approaches to save energy...