Sciweavers

240 search results - page 32 / 48
» Low energy asynchronous architectures
Sort
View
ICRA
2003
IEEE
104views Robotics» more  ICRA 2003»
14 years 1 months ago
Enhancing the reactive capabilities of integrated planning and control with cooperative extended kohonen maps
— Despite the many significant advances made in robot motion research, few works have focused on the tight integration of high-level deliberative planning with reactive control ...
Kian Hsiang Low, Wee Kheng Leow, Marcelo H. Ang Jr...
MICRO
1992
IEEE
128views Hardware» more  MICRO 1992»
13 years 11 months ago
MISC: a Multiple Instruction Stream Computer
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
FPGA
2005
ACM
122views FPGA» more  FPGA 2005»
14 years 1 months ago
Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
Yan Lin, Fei Li, Lei He
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
DATE
2009
IEEE
155views Hardware» more  DATE 2009»
14 years 2 months ago
Dynamic thermal management in 3D multicore architectures
— Technology scaling has caused the feature sizes to shrink continuously, whereas interconnects, unlike transistors, have not followed the same trend. Designing 3D stack architec...
Ayse Kivilcim Coskun, José L. Ayala, David ...