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» Low power architecture of the soft-output Viterbi algorithm
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DAC
2004
ACM
14 years 23 days ago
A new state assignment technique for testing and low power
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J....
DAC
1995
ACM
13 years 11 months ago
Register Allocation and Binding for Low Power
This paper describes a technique for calculating the switching activity of a set of registers shared by di erent data values. Based on the assumption that the joint pdf (probabili...
Jui-Ming Chang, Massoud Pedram
DAC
1997
ACM
13 years 11 months ago
System-Level Synthesis of Low-Power Hard Real-Time Systems
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
Darko Kirovski, Miodrag Potkonjak
DAC
2009
ACM
14 years 2 months ago
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 7 months ago
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
Yunsi Fei, Niraj K. Jha