331 search results - page 22 / 67 » Low power implementation of a turbo-decoder on programmable ... |
159
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
169
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EGH
2003
Springer
15 years 11 months ago
2003
Springer
—We present a method for using programmable graphics hardware to solve a variety of boundary value problems. The time-evolution of such problems is frequently governed by partial...
127
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VLSID
2007
IEEE
16 years 6 months ago
2007
IEEE
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
146
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DATE
2002
IEEE
15 years 10 months ago
2002
IEEE
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
186
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ANNPR
2006
Springer
15 years 7 months ago
2006
Springer
Abstract. Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward m...