331 search results - page 23 / 67 » Low power implementation of a turbo-decoder on programmable ... |
154
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TVLSI
2008
15 years 5 months ago
2008
A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is describ...
170
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ISCAS
2006
IEEE
15 years 12 months ago
2006
IEEE
This paper tackles the problem of accelerating The rest of this paper is organised as follows: section II motion estimation for video processing. A novel architecture details relat...
172
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IPPS
2005
IEEE
15 years 11 months ago
2005
IEEE
“MegaProto” is a proof-of-concept prototype for our project “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, implementing our key idea that a mi...
151
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VLSID
2005
IEEE
16 years 6 months ago
2005
IEEE
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
247
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FCCM
2006
IEEE
15 years 12 months ago
2006
IEEE
Current Radio Frequency Identification (RFID) systems generally have long design times and low tolerance to changes in specification. This paper describes a field programmable,...