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» Low power implementation of high throughput FIR filters
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DATE
2010
IEEE
190views Hardware» more  DATE 2010»
13 years 11 months ago
Ultra-high throughput string matching for Deep Packet Inspection
Deep Packet Inspection (DPI) involves searching a packet's header and payload against thousands of rules to detect possible attacks. The increase in Internet usage and growing...
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
VTC
2006
IEEE
134views Communications» more  VTC 2006»
14 years 21 days ago
Efficient Algorithms for PAPR Reduction in OFDM Transmitters Implemented using Fixed-Point DSPs
OFDM has a very high peak-to-average power ratio. This imposes stringent dynamic range requirements on the analog front-ends of the transmitter and receiver and, if a fixedpoint pr...
Brendon J. C. Schmidt, Chi Ng, Patrick Yien, Chris...
CODES
2007
IEEE
13 years 10 months ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
CODES
2005
IEEE
14 years 10 days ago
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
Anthony Leroy, Paul Marchal, Adelina Shickova, Fra...
AHS
2006
IEEE
152views Hardware» more  AHS 2006»
14 years 23 days ago
Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
Balal Ahmad, Ahmet T. Erdogan, Sami Khawam