Sciweavers

82 search results - page 7 / 17
» Low power logic synthesis for XOR based circuits
Sort
View
IJCSS
2007
133views more  IJCSS 2007»
13 years 7 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 14 days ago
Power consumption of logic circuits in ambipolar carbon nanotube technology
Ambipolar devices have been reported in many technologies, including carbon nanotube field effect transistors (CNTFETs). The ambipolarity can be in-field controlled with a secon...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
ASYNC
1997
IEEE
95views Hardware» more  ASYNC 1997»
13 years 11 months ago
Partial order based approach to synthesis of speed-independent circuits
This paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the fo...
Alexei L. Semenov, Alexandre Yakovlev, Enric Pasto...
ISQED
2006
IEEE
176views Hardware» more  ISQED 2006»
14 years 1 months ago
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
Zhiyu Liu, Volkan Kursun
CODES
2003
IEEE
14 years 21 days ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel