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CODES
2005
IEEE
14 years 2 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
IWSOC
2005
IEEE
141views Hardware» more  IWSOC 2005»
14 years 2 months ago
Design and Optimization of Low-Voltage Low-Power Quasi-Floating Gate Digital Circuits
This paper explores the design and optimization of Quasi-Floating Gate MOS techniques to lowvoltage/low-power digital circuitry. The simulated power consumption of standard CMOS g...
Kenneth A. Townsend, James W. Haslett, Krzysztof I...
RTSS
2007
IEEE
14 years 2 months ago
An Energy-Driven Design Methodology for Distributing DSP Applications across Wireless Sensor Networks
Wireless sensor network (WSN) applications have been studied extensively in recent years. Such applications involve resource-limited embedded sensor nodes that have small size and...
Chung-Ching Shen, William Plishker, Shuvra S. Bhat...
ISLPED
2006
ACM
103views Hardware» more  ISLPED 2006»
14 years 2 months ago
Low power light-weight embedded systems
Light-weight embedded systems are now gaining more popularity due to the recent technological advances in fabrication that have resulted in more powerful tiny processors with grea...
Majid Sarrafzadeh, Foad Dabiri, Roozbeh Jafari, Ta...
DAC
1999
ACM
14 years 9 months ago
Converting a 64b PowerPC Processor from CMOS Bulk to SOI Technology
A 550MHz 64b PowerPC processor was developed for fabrication in Silicon-On-Insulator (SOI) technology from a processor previously designed and fabricated in bulk CMOS [1]. Both th...
D. Allen, D. Behrends, B. Stanisic