552 search results - page 18 / 111 » Low power techniques for Motion Estimation hardware |
ISQED
2000
IEEE
14 years 4 days ago
2000
IEEE
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
ISLPED
1999
ACM
14 years 2 days ago
1999
ACM
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
DATE
1999
IEEE
14 years 2 days ago
1999
IEEE
Previous work has shown that sizable power reductions can be achieved by shutting down a system's sub-circuits when they are not needed. However, these shutdown techniques fo...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
The development cost of low-power embedded systems can be significantly reduced by reusing legacy designs and applying proper modifications to meet the new power constraints. The ...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...