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» Low power techniques for Motion Estimation hardware
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VEE
2006
ACM
178views Virtualization» more  VEE 2006»
15 years 11 months ago
Impact of virtual execution environments on processor energy consumption and hardware adaptation
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
Shiwen Hu, Lizy Kurian John
ICCAD
1994
IEEE
121views Hardware» more  ICCAD 1994»
15 years 10 months ago
A cell-based power estimation in CMOS combinational circuits
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...
Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen
ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
15 years 10 months ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...
ISLPED
1996
ACM
81views Hardware» more  ISLPED 1996»
15 years 10 months ago
Simulation based architectural power estimation for PLA-based controllers
We present an architectural power simulation technique for PLA-based controllers. The contributions of this work are (1) a simple but ecient power characterization of PLAs; and (2...
Srinivas Katkoori, Ranga Vemuri
ISCAS
2007
IEEE
111views Hardware» more  ISCAS 2007»
16 years 4 days ago
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform
—Various instruction and transaction based power estimation techniques for processor and on-chip buses have been proposed in the past. In this paper, we propose a heterogeneous p...
Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdoga...