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» Low power techniques for Motion Estimation hardware
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IPPS
2009
IEEE
16 years 16 days ago
Using hardware transactional memory for data race detection
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
Shantanu Gupta, Florin Sultan, Srihari Cadambi, Fr...
FPL
2004
Springer
98views Hardware» more  FPL 2004»
15 years 11 months ago
Power-Driven Design Partitioning
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...
Rajarshi Mukherjee, Seda Ogrenci Memik
DAC
1998
ACM
16 years 6 months ago
Power Optimization of Variable Voltage Core-Based Systems
The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly characterized by domin...
Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkon...
ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
15 years 10 months ago
A hybrid approach for core-based system-level power modeling
Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
Tony Givargis, Frank Vahid, Jörg Henkel
ASPDAC
2008
ACM
119views Hardware» more  ASPDAC 2008»
15 years 8 months ago
A stochastic local hot spot alerting technique
- With the increasing levels of variability in the behavior of manufactured nano-scale devices and dramatic changes in the power density on a chip, timely identification of hot spo...
Hwisung Jung, Massoud Pedram