Sciweavers

552 search results - page 7 / 111
» Low power techniques for Motion Estimation hardware
Sort
View
ISCAS
2006
IEEE
78views Hardware» more  ISCAS 2006»
14 years 1 months ago
A low power SoC bus with low-leakage and low-swing technique
Kwang-Il Oh, Seunghyun Cho, Lee-Sup Kim
DATE
2000
IEEE
90views Hardware» more  DATE 2000»
14 years 4 days ago
Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...
Jörg Henkel, Tony Givargis, Frank Vahid
COMPCON
1994
IEEE
13 years 12 months ago
Low Power Hardware for a High Performance PDA
The first product in the Newton family operates under severe constraints in the areas of performance, cost, heat dissipation, power consumption, scalability, size and weight. This...
Michael Culbert
ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Motion Estimation for H.264/AVC using Programmable Graphics Hardware
We present an efficient implementation of motion estimation (ME) for H.264/AVC using programmable graphics hardware. The cost function for ME in H.264/AVC depends on the motion v...
Chi-Wang Ho, Oscar C. Au, S.-H. Gary Chan, Shu-Kei...
VLSID
2002
IEEE
132views VLSI» more  VLSID 2002»
14 years 8 months ago
VLSI Architecture for a Flexible Motion Estimation with Parameters
If motion estimation can choose the most suitable algorithm according to the changing characteristics of input image signals, we can get benefits, which improve quality and perfor...
Jinku Choi, Nozomu Togawa, Masao Yanagisawa, Tatsu...