A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
A new circuit technique is proposed in this paper for simultaneously reducing the subthreshold and gate oxide leakage power in domino logic circuits. PMOS-only sleep transistors ar...
- A low overhead circuit technique is proposed in this paper for simultaneously reducing subthreshold and gate oxide leakage currents in domino logic circuits. PMOS sleep transisto...
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...