42 search results - page 6 / 9 » Low-Power, High-Speed CMOS VLSI Design |
ISVLSI
2002
IEEE
14 years 3 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
ISVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
The need for small, high speed, low power computers as the end of Moore’s law approaches is driving research into nanotechnology. These novel devices have significantly differe...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
CMOS Phase-locked loops (PLL) are ubiquitous in RF and mixed-signal integrated circuits. PLLs are very sensitive to noise fluctuations on the power and ground rails. In this paper...
CORR
2010
Springer
13 years 5 months ago
2010
Springer
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
ISCAS
2006
IEEE
14 years 4 months ago
2006
IEEE
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...